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High Performance FIFO Design for Processor through Voltage Scaling Technique


  • Dev Sanskriti Vishwa Vidayalaya, Haridwar, Uttarakhand-249411, India
  • Department of Computer Science, BIAS, Bhimtal, Uttarakhand-263136, India
  • Department of Computer Science, SIT, Pithoragarh, India


Green computing is making revolution by bringing high speed processor with less power consumption. Our paper is based on this philosophy. Objectives: To come out High Performance FIFO for processor by minimizing the power consumption. Methods/Statistical Analysis: To make FPGA based design of FIFO we used voltages and frequency scaling techniques. Keeping voltage constant at 2.3 volt we varied frequency from 20MHz to 250MHz and for other experiment we kept the frequency constant and varies voltages from 1volt to 2.3 volt. Findings: The power consumption is reduced to 95.79% on voltage scaling where as there is a 4.38% less power consumption on frequency scaling. Application/Improvements: It will surely help in futuristic processor development.


Field Programmable Gate Array (FPGA), First in First Out (FIFO), Hardware Description Language (HDL), High Performance Design, Voltage Scaling.

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