Author Details

Pandey, Bishwajeet

  • Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA

      Kavita Goswami,   Bishwajeet Pandey,   D. M. Akbar Hussaian,   Tanesh Kumar,   Kartik Kalia
    Volume 9, Issue 10, March 2016 - Articles

    Abstract  PDF
  • Leakage Power Reduction with Various IO Standards and Dynamic Voltage Scaling in Vedic Multiplier on Virtex-6 FPGA

      Bishwajeet Pandey,   Md. Atiqur Rahman,   Dil M. Akbar Hussain,   Abhay Saxena,   Bhagwan Das
    Volume 9, Issue 25, July 2016 - Articles

    Abstract  PDF
  • A Discussion about Upgrading the Quick Script Platform to Create Natural Language based IoT Systems

      Anirudh Khanna,   Bhagwan Das,   Bishwajeet Pandey,   DMA Hussain,   Vishal Jain
    Volume 9, Issue 46, December 2016 - Articles

    Abstract  PDF