Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: Special Issue 1, Pages: 1-9
I. Chaitanya* , V. Jagan Naveen and B. M. S. Sreenivasa Rao
In this paper, A High Gain Low Power Operational Amplifier was designed in main for the usage of in biomedical applications. The amplifier is designed to produce high gain with less power consumption. The PMOS input transistors are used with high gate areas which operate in subthreshold or cutoff region helps in reduction of flicker noise. Later switched bias is used to further reduce noise levels by making input transistors switch between cutoff and inversion regions. This switched bias helps in reduction of noise with less power, thus helps in low power usage in reduction of noise. The supply voltage is ±1.5V with average gain of the amplifier is 87dB in required frequency range and CMRR of about 128dB. The unity gain frequency is 5.3MHz and cutoff frequency is 43.6KHz. Average power consumption of the model is 24.8µW. The model is designed using TSMC-180nm process, in the S-Edit of Tanner EDA. The simulations are carried under different temperatures i.e. 25o ,36.9o (body temperature) and 40o . This amplifier is intended to amplify neural spikes which are in low amplitudes(mV) and in frequency range of about 5-100Hz.
Keywords: Biomedical, CMRR, Flicker Noise, Operational Amplifier, Switched Bias, Tanner
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