Wireless networks are rapidly developing as an imperative advancement and turning in to a fundamental segment of contemporary day by day life. Digital modulation is used in numerous applications. Mobile radio communication has become an essential part of everyone’s life. In order to increase the battery life of this electronic gadgets, the power and area reduction to be achieved through new techniques. Hence low power digital modulators are in demand.

Quadrature Amplitude Modulation (QAM) allows some considerable gains for the data transmission. As 16QAM transitions to 32QAM, 64QAM, 256QAM and onwards, more eminent information pace could be attainable by the side of the deprivation of noise margin. QPSK and QAM techniques are used to increase the capability and speed of wireless networks. Analog QAM is the combination of AM and PM. Digital QAM is the combination of ASK and PSK. In QAM modulation both amplitude and phase are modulated. The higher order of modulation permits to empower more bits/symbol. Information rate adaptability is maintained between channel considerations and modulation rate. If good signal to noise ratio is attainable, then higher order modulation is employed to achieve higher data rate at higher speed. In case of channel conditions are not meeting the appropriate signal to noise level, and then low information rate can be adaptable to ascertain low error rates ^{1, 2, 3, 4. }^{Q}^{AM}^{ }^{ca}^{n}^{ b}e employed in various mobile radio and quality information delivery appliances. Direct to home (DTH), cable television applications transmit more information signals over the channel. This kind of application utilizes higher order modulation such as 64QAM and 256 QAM. Even though higher order modulators are proficient to provide high speed information signal pace and these are perceptibly minimum reluctant to distortion. ^{5, 6, 7, 8. }^{}

The typical QPSK modulator demands Frequency synthesizer (DDS), adders, and multipliers to generate sine waveform. It requires adders, multipliers to generate a symbol with respect to input bit streams. As low power modulators are in demand for satellite and mobile radio networks, in this work, implantable QPSK modulator is developed, which requires less power for operation. The work is based on generating a symbol using data storage inside a memory block consorting to the incoming information streams. The work is modeled with Verilog hardware description language and Xilinx ISE ^{9, 10}. Low power wide area networks problems are solved through innovative applications developed in recent years, In this work turbo Frequency shift keying is implemented, this FSK outputs the constant envelope waveform ^{11, 12, 13}. In the fourth generation networks, orthogonal frequency division multiplexing employed with Turbo-Frequency shift keying to obtain the constant envelope of the output signal. This improves the performance by minimizing error rate ^{14}.

Three new approaches are projected to 32 bit QAM modulator to achieve low power consumption and area reduction.

The conventional 32QAM modulator is shown in

The sine and cosine data generated out of conventional method are stored in ROM as shown in

The intended 32QAM modulator-3 is designated in

The flow chart shows the steps to generate sine and cosine using proposed algorithm as shown in

The flow chart is shown in

In case of multiplication, power can be minimized through reducing the number of mathematical process. Numerous form of multipliers are “Booth multiplier, combinational multiplier, Wallace tree Multiplier, array multiplier and sequential multiplier”. The input message signal stream is renewed in to parallel data streams. This is stored multiplicand register. The carrier bit streams are stored in the multiplier register. The booth algorithm performs the signed multiplication of multiplicand and the multiplier.

The “Booth algorithm” is employed to product two signed numbers. The signed numbers are in two’s complement format. The binary information stream is converted into parallel bits of data. This data is the multiplicand and the multiplier are the digitized carrier signal. This multiplier is advantageous in terms of speed. If the transition bit and LSB of the input data is 10 and 01 then carrier data is subtracted and added to the product register, then arithmetic right shift is performed. If the transition bit and LSB of the input data is 00 or 11 then only arithmetic right shift is performed on product register. The counter is incremented each time till the input data stream reaches its maximum count. The implementation of 32QAM with multiplication method is represented in

The results of 32QAM modulators are compared. The analysis with respect to power and area utilization is carried out using Cadence software.

Technology | Cells | Leakage Power (nW) | Dynamic Power (nW) | Total Power (nW) | Total Area (µm2) |
---|---|---|---|---|---|

180nm | 40 | 41.97 | 60620.768 | 60662.740 | 1341 |

90nm | 43 | 2314.9 | 13344.346 | 15659.278 | 419 |

45nm | 47 | 76.66 | 3871.279 | 3943.94 | 125 |

The total power in nW and area in µm2 is represented in 180nm, 90nm and 45nm technology respectively. The total area utilized for this design is 1341µm2, 419µm2 and 125µm2 and the total power consumption is 60662.740nW, 15659.278nW and 3943.94nW in 180nm, 90nm and 45nm CMOS technology respectively.

The result of 32QAM modulator with iterative algorithm detailed in

Technology | Cells | Leakage Power (nW) | Dynamic Power (nW) | Total Power (nW) | Total Area (nW) |
---|---|---|---|---|---|

180nm | 563 | 831.986 | 616188 | 617020.07 | 20746 |

csa_tree_a | 65 | 210.056 | 143463.7 | 143673.81 | 4131 |

csa_tree_mul_99_15 | 77 | 76.614 | 33155.32 | 33231.935 | 1790 |

final_adde..ux_ | 50 | 62.864 | 35925.44 | 35988.305 | 1467 |

final_adde..ux_ | 50 | 62.864 | 27679.75 | 27742.617 | 1454 |

csa_tree_mul_101_15 | 66 | 60.745 | 6498.094 | 6558.839 | 1454 |

sub_27_26 | 20 | 25.105 | 6466.940 | 6492.045 | 582 |

csa_mux_a_mux_ | 34 | 25.012 | 20392.77 | 20417.786 | 575 |

csa_mux_a_mux_ | 36 | 23.976 | 22059.14 | 22083.117 | 539 |

add_25_26 | 22 | 20.857 | 11340.97 | 11361.828 | 532 |

csa_mux_a_mux_ | 34 | 25.012 | 20392.77 | 20417.786 | 575 |

csa_mux_a_mux_ | 36 | 23.976 | 22059.14 | 22083.117 | 539 |

add_25_26 | 22 | 20.857 | 11340.97 | 11361.828 | 532 |

csa_mux_b_mux_ | 11 | 5.932 | 6145.343 | 6151.275 | 146 |

csa_mux_b_mux_ | 11 | 5.932 | 1640.546 | 1646.478 | 146 |

90nm | |||||

csa_tree_a | 624 | 33146.4 | 123580.5 | 156727.0 | 6341 |

csa_tree_mul_99_15 | 75 | 6208.64 | 21910.91 | 28119.55 | 1270 |

csa_tree_mul_101_15 | 82 | 2437.32 | 5330.687 | 7768.012 | 548 |

final_adde..ux_iRES_ | 79 | 2287.54 | 946.266 | 3233.810 | 458 |

final_adde..ux_qRES_ | 69 | 1873.82 | 3814.582 | 5688.398 | 446 |

csa_mux_a | 69 | 1873.82 | 3008.073 | 4881.889 | 446 |

csa_mux_a | 32 | 982.680 | 5160.882 | 6143.562 | 173 |

csa_mux_a | 32 | 945.122 | 4696.514 | 5641.636 | 170 |

add_25_26 | 25 | 740.957 | 1688.024 | 2428.981 | 163 |

sub_27_26 | 18 | 706.540 | 2092.739 | 2799.279 | 157 |

csa_mux | 11 | 298.882 | 1703.732 | 2002.614 | 50 |

csa_mux_b | 11 | 298.882 | 456.444 | 755.326 | 50 |

45nm | |||||

qam32_cor | 568 | 543.895 | 14361.687 | 14905.582 | 966 |

mul_99_15 | 181 | 121.847 | 3293.702 | 3415.549 | 218 |

mul_99_15 | 130 | 92.242 | 407.290 | 499.532 | 160 |

sub_27_26 | 48 | 23.394 | 454.866 | 478.260 | 45 |

add_25_26 | 37 | 21.483 | 544.572 | 566.055 | 43 |

The 32QAM with proposed method-3 is shown in ^{2}, 3075µm^{2} and 214µm^{2} in 180nm, 90nm and 45nm technology respectively.

Technology | Cells | Leakage Power (nW) | Dynamic Power (nW) | Total Power (nW) | Total Area (nW) |
---|---|---|---|---|---|

180nm | 196 | 66.270 | 133613.4 | 133679.6 | 2754 |

90nm | 367 | 5647.3 | 79954.16 | 85601.46 | 3075 |

mux_output | 10 | 541.825 | 4623.57 | 5165.39 | 252 |

minus_69_28 | 42 | 494.837 | 6060.497 | 6555.334 | 229 |

add_47_58_I5 | 33 | 386.256 | 6803.298 | 7189.554 | 229 |

add_49_58_I5 | 33 | 386.256 | 5430.852 | 5817.108 | 229 |

add_47_58_I4 | 33 | 386.256 | 6232.807 | 6619.063 | 229 |

add_49_58_I4 | 33 | 386.256 | 5481.578 | 5867.833 | 229 |

add_47_58_I3 | 33 | 386.256 | 5297.709 | 5683.964 | 229 |

add_49_58_I3 | 33 | 386.256 | 4457.876 | 4844.132 | 229 |

add_47_58_I2 | 33 | 386.256 | 4303.839 | 4690.095 | 229 |

add_49_58_I2 | 33 | 386.256 | 3018.781 | 3405.037 | 229 |

mux_output | 5 | 255.937 | 3749.530 | 4005.467 | 153 |

mux_output | 5 | 255.937 | 4990.730 | 5246.668 | 153 |

mux_output | 5 | 255.937 | 5548.394 | 5804.331 | 153 |

minus_41 | 5 | 255.937 | 5387.226 | 5643.163 | 153 |

minus_41_16 | 18 | 227.437 | 3192.387 | 3419.824 | 107 |

mux_output | 5 | 194.058 | 1460.784 | 1654.841 | 76 |

45nm | |||||

qam32_45 | 212 | 117.715 | 6335.195 | 6452.911 | 214 |

The power and area report of all the three new approaches to 32QAM modulators are discussed compared and analyzed in 180nm, 90nm and 45nm CMOS technology using Cadence tool. The power and area reports are discussed below in

The power consumed in all methods are compared and reported in

Technology | 32QAM with Memory | 32QAM with Iterative algorithm | 32QAM with Booth Multiplier |
---|---|---|---|

180nm | 60662.740 | 617020.071 | 133679.687 |

90nm | 15659.278 | 156727.033 | 85601.465 |

45nm | 3943.94 | 14905.582 | 6452.911 |

As depicted in the figure below, the first approach consumes 60662.740nW, the second approach with iterative algorithm consumes 617020.071nW and the third proposed approach with Booth algorithm consumes 133679.687nW in 180nm technology. The power consumed in method1 in 90nm technology in 32QAM modulator with memory is 15659.278nW; with iterative algorithm is 156727.033nW and proposed 32QAM with method-3 is 85601.465nW respectively.

In 45nm CMOS Technology, the first approach consumes 3943.94nW, second approach with iterative algorithm consumes 14905.582nW and the third proposed approach with Booth algorithm consumes 6452.911nW.

An area utilization and comparison is carried out using cadence synthesis tool in 180nm, 90nm and 45nm technology is reported below in ^{2}, 20746.757µm^{2}, and 2754µm^{2} respectively. The area utilized in 90nm technology in method1, method2 and method3 is 419µm^{2}, 6341µm^{2} and 3075µm^{2} respectively. The area utilized in 45nm technology in method1, method2 and method3 is 125µm^{2}, 966µm^{2}, and 214µm^{2} respectively.

Technology | 32QAM with Memory | 32QAM with Iterative algorithm | 32QAM with Booth Multiplier |
---|---|---|---|

180nm | 1341 | 20746.757 | 2754 |

90nm | 419 | 6341 | 3075 |

45nm | 125 | 966 | 214 |

The area comparison report of all the three proposed 32QAM modulators in 180nm, 90nm and 45nm technology is represented in above figure.

In this study, new three approaches are discussed for 32QAM modulator. Area utilization and power consumption report is generated using cadence synthesis tool in 180nm, 90nm and 45nm technology. The proposed techniques for 32QAM system achieves effective concert in terms of area and power comparatively with typical way of designing 32QAM system with Direct Digital Frequency Synthesizer (DDFS). The proposed 32QAM modulator-1 consumes minimum power and utilizes minimum area compared with other proposed methods. The results are tabulated, analyzed and compared. The power consumption is much reduced in the proposed method in comparison with the existing work. The work is carried out in 180nm, 90nm and 45nm CMOS technology. The three novel approaches proposed in this work minimizes the power consumption and area utilization of 32QAM than compared to the conventional method. As the technology scales downs the area and power parameters are further minimized.

The author thanks JSS Academy of technical education, Bengaluru, Karnataka, India for providing Cadence lab facility to carry out this work.