Many wireless medical implants
Conventional CI contains internal parts: Electrode array, transmitter & receiver /Stimulator (9.5 gm) enclosed with external parts: microphone and speech processor. Highly designed CI requires 5-6 hours of surgery for stabilizing hearing sense & placing of Implant inside the ear.
Year |
Inventor |
Device |
Application |
1800 |
Alexandra Volta |
Metal rod insertion |
Auditory Sensation |
1930 |
Waver- Bray |
Auditory nerve connected with electrode |
Sound Processing. |
1950 |
Lundeberg |
Stimulate Auditory nerve using electricity |
Anticipate Processing |
1957 |
Djourna and Eyeries |
Stimulate Auditory with current |
Perfect Auditory Purpose |
1961 |
House- Doyle |
Electrodes insertion for profoundly deaf adults |
Clear Auditory Response |
1972 |
Cochlear Corporation |
1stsingle channel cochlear implant development |
Stimulus functionality |
1984 |
Cochlear Corporation FDA |
Wearable Speech Processor "NUCLEUS" |
Speech Coding Strategy |
1989 |
Cochlear corporation |
Mini Speech Processor (MSP) |
Small size made it suitable for children |
2006 |
Ronald |
Advanced Electrolyte Stylet (AOS) |
Multi-channel Speech Processor. |
The scope of the electronics in CI is to design the functioning circuits like speech processor, transmitter, etc., by using VLSI technology. The signal processing of the external source to the internal part of the ear is perfectly prototype in
From the Era of Telephone by Graham Bell in the 18th century, Electrophonic Perception of Stevens with his colleagues in the 19th century, William's Gold Electrode implantable chip in the mid of 19th century proven the audio-signal stimulates in deaf patients & prearranged the trail invention of hearing-aid implantable devices. Various implantable integrated analog circuits have been designed for numerous clinical applications such as cardiac pacemakers, cochlear implants, retinal prostheses, and functional neuromuscular stimulation (FNS) systems. These devices are active implants that require energy sources like solar, infrared & wireless energy transfer for functioning
These approaches can avoid the risk of causing infection and battery life problems. In general, implantable systems must satisfy the following requirements: 1) long-lifetime, 2) high reliability and 3) small size. The implanted device (bio-devices) senses the internal data (body) and converse with the external world by means of power and telemetry
The telemetry circuit implemented in CMOS technology for cochlear implants is shown in
To achieve the desired characteristics of low cost, small size, low power implants, conventional CMOS implants are implemented with 20nm FINFET Technology
In the implant design, a Monostable multi-vibrator is used as the timer to produce the data rate in user-specified time. The proposed circuit is designed with driving large capacitive loads which are implemented using NMOS technology with less delay, a number of stages, and the width value as shown in
At the external transmitter side, the PPSK demodulator is considered. Comparing with the other modulation techniques the efficient way for authorizing data is done by using PSK
For example, of the generated output of the Monostable circuit, the change of a number of bits of transmitted input (IN) 12Kbits to receive output bits with an error of 4 bits (VOUT) is defined as BER. So error bits are four divided by 12K transmitted bits. The error rate is 0.0000333.
The simulated waveform for M1 and M2 circuits is generated by FINFET 20 nm technology using the cadence tool by applying 0.4v. As per the transient analysis, the settling time is considered as 7ns for data transmission consequently, the frequency range is of 14MHz
Technology |
FINFET 20nm |
Design Tool |
CADENCE |
Supply Voltage |
0.4v |
Telemetry Specifications |
UPLINK |
Monostable frequency range |
14MHz |
Programmable Monostable Circuits (M1,M2) |
Implemented using Driving Large Capacitive Loads |
Monostable Bit Error Rate |
0.0000333 |
Uplink Modulation |
PPSK using Low pass filter |
PPSK demodulator is implemented with 0.4v supply voltage in 20 nm FINFET technology here VIN, VAMP, a low pass filter capacitor C are the inputs, and VOUT is the output. The simulation results are shown below. It is observed in
Design |
Delay(ns) |
Dynamic Power Dissipation(µW) |
Power Delay Product PDP (j) |
Current Consumption(A) |
CMOS Monostable Circuit |
116.3 |
8.29 |
0.096p |
1.26m |
FINFET Monostable Circuit |
3.3825 |
5.38 |
0.018p |
0.81µ |
In this paper, Monostable and RF Clock Generator are implemented for cochlear implant application in 20nm FINFET Technology. The existing comparator is replaced by an Active Low pass filter to achieve high accuracy. The conventional monostable circuit is reinstated with driving large capacitive loads to reduce complexity. It is observed that the performance of the proposed design is improved to a large extent, with reduced delay to 34.38% and power dissipation to 1.54% with respect to the conventional methods in CMOS. Hence, by using this advanced FINFET technology the performance is increased by 30%.
Yatavakilla Amarendra Nath prepared the research methodology and idea for comparative study. All the simulations design, study, and manuscript preparation are done by Hima Bindu Katikala who was assisted by both G.Ramana Murthy and Yatavakilla Amarendra Nath. Result analysis and manuscript proofreading are verified by Professor G.Ramana Murthy.
The authors sincerely thank the Department of Electronics and Communication Engineering, VFSTR, Andhra Pradesh, India for providing the support to conduct the experimental work. This paper is in Research Square Preprint with DOI: https://doi.org/10.21203/rs.3.rs-370782/v1 and It is author's own work, not yet published in any other journal.