Total views : 131
Experience in Designing Multi-Channel Time-To- Digital Converter
Objectives: The article presents the results of the development of multi-channel timeslot measurement system for laser radar for space application. Methods: FPGA Spartan-6 system (Xilinx, USA) was used for the development of our system. Vernier method was applied for timeslot measurement that enabled to obtain high accuracy of the results without using high-frequency signals. Findings: The result of our work was the development of time-to-digital converters (TDC) with extremely low sensitivity to temperature changes. At the same time our TDC was a complete digital device and had lower sensitivity to electromagnetic interference and noise in the supply chain. The results of this development could be interesting to a wide range of specialists focusing on the development of digital systems for both ground and space application. Improvements: A 64-channel TDC has been developed. Due to the self-measurement of characteristics in real time the developed TDC does not require additional correction and adjustment before use.
Programmable Logic Device (PLD), Time-to-Digital Converters (TDC).
- Lin MC, Tsai GR, Liu CY, Chu SS. FPGA-Based High Area Efficient Time-To-Digital IP Design. Proceedings of TENCON 2006. USA: 2006. p. 110−1. Crossref
- Balla A, Beretta M, Ciambrone P. The characterization and application of a low resource FPGA-based Time to Digital Converter. Nuclear instruments and methods in physics research section A: accelerators, spectrometers, detectors and associated equipment. 2014; 739:75−82. Crossref
- Bourdeauducq S. A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs. Available from https://www.researchgate.net/publication/258818689_A_26_ps_RMS_ time-to-digital_converter_core_for_Spartan-6_FPGAs.
- Fishburn MW, Menninga LH, Favi C, Charbon E. A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source Applications. IEEE transactions on nuclear science. 2013; 60:2203−8. https://doi.org/10.1109/TNS.2013.2241789
- Jovanović GS, Stojčev MK. Vernier’s Delay Line Time– to–Digital Converter. Scientific Publications of the State University of Novi Pazar. SER. A: APPL. MATH. INFORM.And MECH. 2009; 1(1):11–20.
- There are currently no refbacks.
This work is licensed under a Creative Commons Attribution 3.0 License.