• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2018, Volume: 11, Issue: 5, Pages: 1-15

Original Article

A Simulated Annealing-based Optimization Approach for Minimizing the THD in Asymmetric Cascaded Multilevel Inverter


Objectives: This paper focuses on the reduction of harmonic content in the voltage output waveform of a 31 level asymmetric monophasic cascaded multilevel inverter using the Simulated Annealing Optimization (SAO) algorithm. Method: The SAO algorithm was used to find the appropriate switching angles for the stages of the converter using MATLAB. First, the technique employed was simulated and evaluated; then, a prototype of the multilevel inverter was developed for validating the results obtained in simulation. Findings: The output waveform, the harmonic profile graphic, and THD evolution were obtained both the simulation and the prototype. The SAO algorithm allowed to calculate the appropriate switching angles for the asymmetric multilevel inverter, permitting to obtain a low THD (less than 5%), using a relatively low number of semiconductors compared with the symmetric topology. The SAO algorithm also allowed finding the solution of transcendental equations system through a heuristic approach, avoiding the local minima problem presented in traditional methods. Novelty /Improvement: The proposed method (SAO) avoids the potential issues with local minima present in traditional methods for the switching angles computation in cascaded multilevel inverters.

Keywords: Multilevel Inverter, Simulated Annealing, THD 


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