Indian Journal of Science and Technology
Year: 2015, Volume: 8, Issue: 19, Pages: 1-10
V. Soumya1* , Raghavendra Shirodkar2 , A. Prathiba1 and V. S. Kanchana Bhaaskaran1
1 School of Electronics Engineering, VIT University Chennai Campus, Chennai-600127, Tamil Nadu, India; [email protected], [email protected]
2 NXP Semiconductors India PVT LTD, Bangalore-560045, Karnataka, India; [email protected]
Background: With the advent in hand held mobile computing devices, the demand for high performance compact processors is increasing. In this work a processor is designed with hardwired instructions for elementary mathematical functions like sine, cosine, sinh, cosh, division and multiplication. Methods: The processor employs Coordinate Rotation Digital Computer (CORDIC) algorithm for efficient hardware implementation of the above mentioned instructions. The parallel and pipelined implementation of the processor is carried out. The pipelined processor is configured as waveform generator. The novelty ofthiswork is the integration of both trigonometric and hyperbolic operations in the same processor. Findings: ASIC Implementation is carried out with 40nm technology libraries. The parallel processor so designed operates at maximum frequency of 24.23 MHz and pipelined processor operates at maximum frequency of 261.36 MHz. Conclusion: This increase in operating frequency is achieved at the cost of increased silicon area and optimal power dissipation. The waveform generator generates sine, cosine waves of 3.5 MHz and sine hyperbolic, cosine hyperbolic waves and exponential waves of 7.9 MHz. The limitation being the waveform generator generates waves of constant frequency. Additional circuit is required in generating waves of different frequencies.
Keywords: Coordinate Rotation Digital Computer (CORDIC), Parallel Architecture, Pipelined Architecture, Waveform Generator
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