Indian Journal of Science and Technology
Year: 2018, Volume: 11, Issue: 17, Pages: 1-7
S. Pradeep*, B. Nandhini and K. Ribana
*Author for correspondence
M. Kumarasamy College of Engineering, Karur – 639113, Tamil Nadu, India; [email protected]
Objective: The decoder dynamic power consumption has to be reduced. Delay in decoding must be reduced with lesser area. Better area consumption is one main objective of the Hi ECC technique. Methods/Statistical Analysis: Logarithmic delicate choice translating of Reed-Solomon codes can significant coding pick up with polynomial multifaceted nature. Especially, the low intricacies pursue (LCC) ASD interpreting has better execution many-sided quality exchange off. The test vectors should be added over and a polynomial determination conspire should be utilized to choose one introduction yield to send rest deciphering steps. Findings: In this technique RS codes are utilized for simplification. So improvements are proposed for a low many-sided quality polynomial determination plot. At that point introduction plot is produced to make disentangled polynomial determination by just chose vectors are interjected over. Two introductions can be brought together in single emphasis. To lessen dormancy parallel interpolator is utilized to get various yields and enhance speed. Application/Improvements: Data rate is reduced from 12Mbps to 1.1 Mbps. Encoder needs less computation time than decoder. Less computation time of decoder has to be considered for the improvement.
Keywords: Decoding, High Speed, Interpolation, Low Complexity, RS Coder, LCC Decoding
Subscribe now for latest articles and news.