• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2015, Volume: 8, Issue: 20, Pages: 1-6

Original Article

Low-Power Multi-Layer Perceptron Neural Network Architecture for Speech Recognition


Background/Objectives: Recent research focuses on low-power design techniques. This has been mainly inspired by the demand of hand-held electronic devices which have to consume less power. Neural network based classifiers are widely used in speech recognition which needs higher power. Methods/Statistical Analysis: A hybrid approach for designing architecture of Multi-Layer Perceptron (MLP) based Neural Network (NN) for speech recognition is proposed using bipartite tabular method and banking organization method. This approach is prototyped in Xilinx xc3s1200. The Back propagation neural network is trained in MATLAB using TIDIGITS corpus. Using the optimized weights from MATLAB, the proposed prototyped low-power architecture is evaluated in Xilinx. Findings: The outcome shows a considerable reduction both in area and power. Conclusion/Improvements: The reduction in switching power is by 33% and the average power is by 25% are noted. There was 2% reduction in the resources used by the proposed architecture.
Keywords: Banking Organization Method, Bipartite Tabular Method, Low Power Architecture, Multi-Layer Perceptron Neural Network, Speech Recognition


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