Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: 40, Pages: 1-4
V. Karthik Reddy* , M. Guduri, N. Lakshmi Dheshik Reddy, P. Dharani, S. Prasad and A. Islam
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India; [email protected]
*Author for correspondence
Electronics and Communication Engineering
Objectives: The objective of this research article is to extract threshold voltage of fully depleted silicon on insulator (FDSOI) [email protected] gate length of 220 nm. Methods/Analysis: This paper aims at modeling of fully depleted silicon on insulator (FDSOI) device @ gate length of 220nm. This work finds threshold voltage of FDSOI device using linear extrapolation method. Findings: Threshold voltage of the device is found to be 0.21 V. For different gate voltages, drain current versus drain voltage characteristics curves are plotted in this paper. Novelty /Improvement: The modeled device is applicable in designing ultra-low power circuits which are useful in portable and wearable devices.
Keywords:Drain Current, Drain Voltage, FDSOI Device, Gate Voltage, Linear Extrapolation, Threshold Voltage
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