• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2016, Volume: 9, Issue: 25, Pages: 1-5

Original Article

A FPGA Software based GPS Receiver Implementation with Signal blocker through Simulink


Background/Objectives: Field-Programmable Gate Array (FPGA) software based Global Positioning System (GPS) receiver has been designed and developed using the C language interface environment. GPS Receivers are used for tracking a signal and calculates the current position of the signal in real time. GPS Receiver is a real time application used for tracking purpose. Methods/Analysis: A GPS Receiver works on specially coded GPS satellite signals. The signal is processed in a GPS receiver for computing position, velocity and time. A GPS uses minimum four satellite signals for computing positions in three dimensions using the real time receiver clock. Findings: In this paper, it is planned to build a FPGA-based software GPS receiver using a high level Matlab design Simulink tool. This GPS Receiver is used to design such components that require huge computation like baseband signal processing correlator, C/A code generator, Discriminator Code Loop (DCL) are designed by the Xilinx FPGA block and implemented in Matlab/Simulink. Novelty: The “GPS Receiver Processing Captured Satellite data” model of GPS system without jammer, the signal level display shows the value 0.1779; but in case of a jammer, the signal level is reduced to 0.1447 which is 81% of the initial signal level. So, jammer reduces the signal strength and makes the signal weaker. 
Keywords: C/A Code, Field-Programmable Gate Array, Global Positioning System, Matlab, Satellite, Signal blocker


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