• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2016, Volume: 9, Issue: 40, Pages: 1-7

Original Article

Design and Simulation of Power Efficient Linear MOS Transconductor


Objectives: This paper proposes design of a linear and power efficient transconductance amplifier for Asynchronous Sigma-Delta Modulator (ASDM). Methods/Statistical Analysis: The proposed tranconductor circuit uses two linearization techniques which have been combined for design improvement. A triode transistors configuration with cross coupled transistor pair is used to increase the linearity. Findings: The proposed transconductor is specially designed to act as a filter for ASDM. The topology attains a DC gain (Ao ) of 25 dB, a Gain-Bandwidth Product (GBW) of 70 MHz, cut-off frequency of 4 MHz and a power consumption of 72.44 μW when used as an integrator. Application/Improvements: Transconductor is simulated in TSMC 0.18µm technology with an operating voltage 1.8 V. Simulation results shows that the power consumption of circuit is very less, which makes it suitable for low power signal processing applications.
Keywords: Asynchronous Sigma-Delta Modulator (ASDM), Integrator, Linearity, Power Efficient, Transconductor 


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