• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology

Article

Indian Journal of Science and Technology

Year: 2015, Volume: 8, Issue: 4, Pages: 392-399

Original Article

Development of Active Neutral Point Clamped Multilevel Inverter Fed BLDC Drive Employing FPGA

Abstract

Multilevel inverters have been popularly used for high power applications. These inverters are preferred for BLDC drive compared to conventional inverters as they reduce the stress across the switches and the spectral quality of the output is improved. This paper presents the implementation of a novel three-phase Active Neutral Point Clamped Multilevel Inverter (ANPCMLI) fed brushless DC motor. The main advantage of BLDC is the presence of electronic commutator. The electronic commutation instants are determined by rotor position which is either by position sensors or by sensorless techniques. In this paper, the commutation logic is implemented using FPGA and it receives hall sensor output from BLDC motor (1kW) and generates the gate pulses which drive the IGBT switches of the proposed multilevel inverter. A model of the ANPCMLI with BLDC drive is simulated in MATLAB and the sensored control is implemented on a FPGA platform. A prototype of three-phase MLI feeding BLDC drive is developed and the simulation results are verified. The performance of proposed inverter is compared with conventional voltage source inverter for BLDC drive. It is found that the torque ripple and harmonics are reduced with the proposed inverter structure.

Keywords:
Active Neutral Point Clamped Multilevel Inverter, Brushless DC Motor, Field Programmable Gate Array

DON'T MISS OUT!

Subscribe now for latest articles and news.