Indian Journal of Science and Technology

Abstract

Background/Objectives: Reconfigurable architecture has ability to dynamically allocate the hardware resources during runtime. It can be effectively used in computationally intensive application like media processing. As the motion estimation in video coding consumes large amount of computational time and resources, it can be mapped into reconfigurable architecture to effectively manage the power utilization by dynamic reconfiguration. Methods/Statistical Analysis: A systolic array based reconfigurable architecture for motion estimation which can be configured based on the properties of input video is proposed. A dynamically reconfigurable hardware is designed which can be worked on different search regions based on the level of motion in frames of input video. For the input video, the level of motion among the adjacent frames is determined by motion analyzer. Based on the level of motion between the frames of video, the search window size for block search is selected and this selection will enable the optimum number of processing elements for processing. This dynamic selection of hardware resources based on the search window reduces the power dissipation and computational complexity. Findings: Two search windows have been fixed for analysis 8 × 8 and 7 × 7. For power dissipation analysis, the total logic elements, total registers and fan-out for each design is taken. The performance is analysed by enabling selective number of processing elements for different size of search window. It is observed that power dissipation is high for the search window 8 × 8, because the resource utilization is higher than 7 × 7 search window. Instead of using the same fixed search window for performing block batching, different sized search windows can be used based on the level of motion of the video. After analysis, it is positively found that the proper selection of search window will lead to the optimum utilization in terms of power and resources. Application/Improvements: The context-aware reconfigurable hardware design for highly computationally intensive applications like video processing would be helpful in optimizing the power and resource utilization in hand held devices like smart phones, cam-coders etc. 
Keywords: Motion Estimation, Motion Vector, Power Optimization, Reconfigurable Architecture, Video Coding