Improving Testability of Design in FPGA using Raspberry Pi

S  Karthik; N  Srividya; L  Swetha   and Jean Shilpa

doi:10.17485/ijst/2016/v9iS(1)/108455

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Improving Testability of Design in FPGA using Raspberry Pi

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Indian Journal of Science and Technology

DOI: 10.17485/ijst/2016/v9iS(1)/108455

Year: 2016, Volume: 9, Issue: Special Issue 1, Pages: 1-4

Original Article

Improving Testability of Design in FPGA using Raspberry Pi

S. Karthik^1*, N. Srividya¹ , L. Swetha¹ and Jean Shilpa²

¹ Electronics and Communication Engineering, SRM University, Vadapalani, Chennai - 600026, Tamil Nadu, India; [email protected]
[email protected]
[email protected]
² Electronics and Communication Engineering, BSAU University, Chennai - 600048, Tamil Nadu, India; [email protected]
*Author for correspondence
Karthik
Electronics and Communication Engineering
Email: [email protected]

This work is licensed under a Creative Commons Attribution 4.0 International License.

Abstract

Objective: To implement a logical approach for providing better ability to observe and control FPGA pins through Raspberry Pi for functional verification of FPGA based system design. Method/Analysis: It mainly involves improving the testability of design in FPGA using Raspberry Pi. Findings: The use of Raspberry Pi makes the controllability and observability of FPGA pins easy and the inputs, outputs of FPGA can be remotely controlled via Webiopi which is a web interface for Raspberry Pi. Novelty/Improvement: The web interface is also used to start the BIST and to test the FPGA with test vectors any times.
Keywords: ATE, BIST, FPGA, Raspberry Pi, Webiopi