Indian Journal of Science and Technology
Year: 2015, Volume: 8, Issue: 13, Pages: 1-6
C. Ramya1* and S. Saravanan2
1 VLSI Design, SASTRA University, Thanjavur-613401, Tamil Nadu, India; [email protected] 2 School of Computing, SASTRA University, Thanjavur-613401, Tamil Nadu, India; [email protected]
Designing of confidential ICs must satisfy many design rules in order to rectify the various attacks and to protect the secret data. Based on the concept of withholding information, on-chip comparisons for actual and expected response have already been proposed. From the security point of view, few limitations of existing method limit the security level. Some countermeasures have been proposed in order to secure the scan technique and on-chip comparison. In this paper, an additional inverter is introduced within the scan chain architecture. The introduction of flipped scan chain increases the switching of scan output and increases the complexity to retrieve the secret data. On comparing with Traditional scan chain, proposed method results in only negligible area overhead with high security level. This result shows that possible trials will be more than to hack the data. The proposed method can be applied for all scan testing.
Keywords: Flipped Scan Chain, On-Chip Comparison, Scan Chain
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