• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2008, Volume: 1, Issue: 3, Pages: 1-4

Original Article

Reduction of power dissipation in sequential circuits


In this paper, an attempt is made to reduce the power consumption of a synchronous digital system by minimizing the total power consumed by the clock signals. This paper presents a state assignment technique called priority encoding which uses multi-code assignment plus clock gating to reduce power dissipation in sequential circuits. The basic idea is to assign multiple codes to states so as to enable more effective clock gating in the sequential circuit. Experimental results demonstrate that the priority encoding technique can result in sizable power saving.

Keywords: priority encoding, multi code state assignment, clock gating.


Subscribe now for latest articles and news.