Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: 36, Pages: 1-10
P. Dipu* and K. Sivasankaran
Department of Micro and Nanoelectronics, School of Electronics Engineering, VIT University, Vellore - 632014, Tamil Nadu, India; [email protected]
*Author for correspondence
Department of Micro and Nanoelectronics
Objectives: To design a Low Noise Amplifier (LNA) using Double Gate (DG) FinFET with 1.2 dB noise figure over bandwidth of 24GHz. Methods: Temperature effect on noise figure, stability is also analyzed and the effect of thermal noise and flicker noise in CG LNA is presented. Findings: The designed LNA gives an IIP3 value of 5.58 dB and 1dB compression point of -5.6 dB with proper matching conditions. The maximal efficiency of 80% was achieved for different topologies with 364 MHz switching frequency. Improvements: The designed amplifier provides a maximum voltage gain of 17 dB with a noise figure less than 2 dB as compared to that of conventional MOSFETs based LNA.
Keywords: DG-FinFET, IIP3, Low noise Amplifier, Noise Figure, Stability
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