A CORDIC based Configurable Fixed-Point Design on FPGA using Minimal Hardware

G  Edwar Jacinto; Fredy H  Mart iacute nez  and S  Fernando Mart iacute nez

doi:10.17485/ijst/2017/v10i24/110790

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A CORDIC based Configurable Fixed-Point Design on FPGA using Minimal Hardware

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Indian Journal of Science and Technology

DOI: 10.17485/ijst/2017/v10i24/110790

Year: 2017, Volume: 10, Issue: 24, Pages: 1-5

Original Article

A CORDIC based Configurable Fixed-Point Design on FPGA using Minimal Hardware

G. Edwar Jacinto, Fredy H. Martínez^* and S. Fernando Martínez

Technological Faculty, District University Francisco José de Caldas, Bogotá D.C., Colombia; [email protected], [email protected], [email protected]

*Author for the correspondence:
Fredy H. Martínez
Technological Faculty, District University Francisco José de Caldas, Bogotá D.C., Colombia; [email protected]

This work is licensed under a Creative Commons Attribution 4.0 International License.

Abstract

Objectives: To design a COordinate Rotation DIgital Computer (CORDIC) based electrical signal processing system for efficient and minimalist electrical power processing. Methods: This stage of assessment describes the design and performance of a true RMS (Root-Mean Square) voltage meter on Xilinx SPARTAN 3E 1600 FPGA. Findings: The effectiveness of the proposed designs is assessed through FPGA implementations and error simulations. Measurement results show that the model can reproduce behaviors similar to the original model traditional use of multipliers, but with less resource consumption (hardware and processing time). Novelty: The use of CORDIC to reduce the computational cost of the algorithm, and its implementation in an embedded system.

Keywords: CORDIC, Embedded System, FPGA, Real-Time, True RMS