• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2011, Volume: 4, Issue: 4, Pages: 440-442

Original Article

A low-leakage current power 45-nm CMOS SRAM


A low leakage power, 45-nm 1Kb SRAM was fabricated. The stand-by leakage power of a 1K-bit memory cell array incorporating a newly-developed leakage current reduction circuit called a self-controllable voltage level (SVL) circuit was only 3.7 nW, which is 5.4% that of an equivalent conventional memory-cell array at a VDD of 1.8V. On the other hand, the speed remained almost constant with a minimal overhead in terms of the memory cell array area.
Keywords: SRAM, memory cell array, leakage current.


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