Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: 8, Pages: 1-7
Mishra Ashish1*, Sharma Aditya1 , Verma Pranet1 , Abhijit R. Asati1 , Raju Kota Solomon2
1Department of Electrical and Electronics Engineering, BITS-Pilani, Pilani Campus, Vidya Vihar, Pilani - 333031, Rajasthan, India. 2Reconfigurable Computing Systems & Wireless Sensor Network Systems Lab, Digital System Group, CSIR-CEERI, Pilani - 333031, Rajasthan, India; [email protected], [email protected]
*Author for Correspondence
Mishra Ashish Department of Electrical and Electronics Engineering, BITS-Pilani, Pilani Campus, Vidya Vihar, Pilani - 333031, Rajasthan, India.
Validation of the robustness, efficiency of allocation and scheduling heuristics in large scale parallel and distributed systems is usually done using synthetic randomly generated workloads, represented by task graphs. Randomly generated graph are required for verification of algorithms in multidisciplinary streams. This requires that the number of nodes and the connections can be large ranging from few nodes to thousand nodes, which is demands the machine assisted development. These graphs are used as input format for many domains and require the simplest format for parsing. This research work focuses on generation of such graphs in IBM Graphviz dot format by defining the user requirement in simple formats. Three algorithms have been proposed which generate graph with proper inter connections. The task nodes are placement randomly using a layer-by-layer approach and then connected randomly. The developed generator called Modular Random Task Graph generator (MRTG) can generate task sets containing several different types of task graphs like rooted trees, isomorphic graphs and similar graphs with same node placement but different connections, with the flexibility to dictate the type of graph generated. The developed tool allows the user to generate simulated input and can be extended to any format as it is written in modular format in C++.
Keywords: Graph Generation, Hardware Software Codesign, Isomorphism, Task Graph
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