• P-ISSN 0974-6846 E-ISSN 0974-5645

Indian Journal of Science and Technology


Indian Journal of Science and Technology

Year: 2016, Volume: 9, Issue: 48, Pages: 1-7

Original Article

A Novel Architecture of FBMC Transmitter using Polyphase Filtering and its FPGA Implementation


Background/Objectives: In most of the Cognitive radio and frequency spectrum access we are using Filter Bank Multicarrier (FBMC) architecture; the Cognitive radio changes its parameters according to the environmental changes to operating the data in transmitting and receiving. This design makes use of FBMC to process according to parameter changes. Methods/Statistical Analysis: Here we design an efficient Architecture for FBMC Transmitter using Polyphase filter technique. The polyphase filter contains low power FIR Filters, Modified Booth multipliers, Carry save adders and it is flexible to fixed-point and floating point arithmetic. We are using Pipelined architecture to design an IFFT Module in the transmitter. Findings: The proposed FBMC Transmitter is better in terms of performance, complexity overhead compared to conventional methods. The FBMC Transmitter is designed and implemented on Artix 7 FPGA and compared with different FPGA’s and Results are verified on Chip Scope pro tool. Applications/Improvement: FBMC as a new concept in cognitive radio applications for dynamic access spectrum management purpose.
Keywords: Cognitive Radio, Chip Scope-Pro Tool, FBMC, IFFT, FPGA, Polyphase Filtering


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