Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: 40, Pages: 1-6
Manisha Guduri* and Aminul Islam
Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India; [email protected]
*Author for correspondence
Department of Electronics and Communication Engineering
Objectives: This paper analyses various Complementary MOS (CMOS) based XOR circuits in terms of their output voltage levels at deep subthreshold/low frequency region at 16-nm technology node and finds out the suitable XOR circuit for ultralow-power applications. Methods/Analysis: It also provides the worst case high and low output level for various XOR circuits at supply voltage 130 mV. Findings: In addition, it compares the average power dissipation that is the sum of both dynamic and leakage power dissipation (stand-by power dissipation) of XOR circuits along with the variability analysis of power dissipation in order to find the XOR circuit which is most robust and dissipate the least average power. Novelty/Improvement: Simulation result shows that Power-less XOR circuit is having a good output high and low level in all cases and most promising in terms of robustness and average power dissipation among all the other XOR circuits at deep subthreshold/low frequency region of operation.
Keywords: Average Power Dissipation, CMOS, Low Frequency, Subthreshold Region
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