Indian Journal of Science and Technology
DOI: 10.17485/ijst/2013/v6i6.8
Year: 2013, Volume: 6, Issue: 6, Pages: 1-5
Original Article
A. Priya1*, N. Rajesh2 and R. Muthaiah3
1 PG Student, School of Computing (VLSI), [email protected]
2 Associate Prof, School of EEE, [email protected]
3 Professor, School of Computing (VLSI), [email protected]
*Author For Correspondence
A. Priya
PG Student, School of Computing (VLSI),
Email: [email protected]
This paper presents carrier synchronization in software defined radio for 8PSK technique. Software Defined Radio (SDR) plays a major solution for the need for flexibility, upgradability, and the problems of implementing multiple radio standards alternatively and even running several services in parallel. Previously carrier synchronization in software defined radio is implemented using QPSK technique and synchronization is done using PLL concept. The drawback in this we can transmit only few (only two) number of bits while synchronization is performed. The carrier synchronization by software defined radio using 8PSK technique will allow more number (three) of bits during synchronization, and the same bandwidth which is used for QPSK technique. The main advantage is the transmitting of three bits which reduces the time consumption and the synchronization is performed using COSTAS LOOP. The purpose and advantage of Costas loop compared to PLL is error voltage. The error voltage is less in Costas loop, due to this synchronization is performed effectively. The complete codings are coded using MATLAB.
Keywords: Software Defined Radio, 8PSK, Costas Loop
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