Design and Verification of Slave Block in Ethernet Management Interface using UVM

K  Jagannadha Naidu  and M  Srikanth

doi:10.17485/ijst/2016/v9i5/87173

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Design and Verification of Slave Block in Ethernet Management Interface using UVM

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Indian Journal of Science and Technology

DOI: 10.17485/ijst/2016/v9i5/87173

Year: 2016, Volume: 9, Issue: 5, Pages: 1-7

Original Article

Design and Verification of Slave Block in Ethernet Management Interface using UVM

K. Jagannadha Naidu^* and M. Srikanth

VLSI Division, School of Electronics Engineering, VIT University, Vellore - 632014, Tamil Nadu, India; [email protected], [email protected]

*Author For Correspondence
K. Jagannadha Naidu VLSI Division, School of Electronics Engineering, VIT University, Vellore - 632014, Tamil Nadu, India; [email protected]

This work is licensed under a Creative Commons Attribution 4.0 International License.

Abstract

Objective: Verification of the Slave Block in Ethernet Management Interface using UVM. Methodology: Management Data Input Output (MDIO) and Management Data Clock (MDC) is a two-wire interface used by Ethernet Station Management Entity to configure as well as read status from various PHY devices connected to it. Universal verification methodology is used to verify integrated designs. Verification of the Slave block in Ethernet Management Interface is done through UVM. Findings: Verification environment for the Slave Block in Ethernet Management Interface is built using UVM. 94.44% functional coverage and 97.96 code coverage is achieved. Applications: Ethernet protocol is used in the computer communication.

Keywords: Ethernet Management Interface, System Verilog, UVM, Verification