Indian Journal of Science and Technology
Year: 2016, Volume: 9, Issue: 29, Pages: 1-7
P. Anbarasan* , K. Hariharan and R. Parameshwaran
School of Computing, [email protected]
*Author for correspondence
School of Computing,
Email: [email protected]
In this paper, low power low voltage Op-amp which forms the basic building block for various devices is designed by making the transistors of the Op-amp to operate in sub-threshold region. Now-a-days portable electronic devices are of great demand which thereby increases the demand for low power and low voltage design of devices. Conventionally, two stage op-amps are used which requires higher power with comparatively low gain. In order to overcome this, operation of devices in sub-threshold region is carried out which requires low power comparatively. Initially, the design of conventional Op-amp is designed using CADENCE Virtuoso tool GPDK 180nm with a supply voltage of 1.8V and the corresponding gain, phase margin, power of the conventional Op-amp is observed and then, Op-amp with transistors operating in sub threshold region is designed using CADENCE Virtuoso tool GPDK 180nm with a supply voltage of 1.8V and the corresponding gain, phase margin, power is observed. The comparison between these two observations are made and presented. These low power high gain devices are used in various applications like ADC/DAC devices and many medical applications.
Keywords: Op-amp, Phase Margin, Gain, Sub-Threshold Region
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