Indian Journal of Science and Technology
DOI: 10.17485/ijst/2016/v9iS1/107902
Year: 2016, Volume: 9, Issue: Special Issue 1, Pages: 1-5
Original Article
Jyothi Leonore Dake and Sudheer Kumar Terlapu
Department of ECE, Shri Vishnu Engineering College for Women (Autonomous), Bhimavaram −534202, Andhra Pradesh, India; [email protected]
[email protected]
Cryptography has been increasingly used due to its rapid trends. In recent days, it has been used mostly in communication and in financial transactions through automated machines or internet. The applications of cryptography and coding theory require finite field operations and are realized based on the finite field computations. In this paper efficient digit-serial multiplier over finite field is implemented and is obtained by using Redundant Basis (RB), intend to present highthroughput multiplier. Area and power are the two factors which obtain less when compared to the previous multipliers. The digit-serial multiplier for 32-bit is implemented using Verilog HDL and synthesized to know its better performance in terms of area and power compared to previous multipliers.
Keywords: Cryptography, Digit-Serial, Finite FIELD, Redundant Basis
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