Indian Journal of Science and Technology

Abstract

Background/Objective: This article presents an image acquisition system which consists of two important elements, namely a CMOS sensor and an FPGA. Method: In this article, the domain under observation is incessantly supervised by capturing the video of the area. This is successfully completed with the help of the CMOS sensor, through which the image frames are captured. Pixel data interface and CMOS senor are connected to the FPGA through the I2C bus. VGA Controller module in the FPGA will read the pixel data from one of the ports of DDR SDRAM and it can display the video on LCD monitor. FPGA used in the present work is Cyclone II, which is manufactured by ALTERA. Quartus II 13.0 suite is used for software development. FPGA will be programmed with the help of Verilog HDL. Findings: The mode register of the CMOS sensor is programmed with I2C protocol, so that CMOS settings like resolution, exposure are configured with this protocol. ALTERA DE2 board consists of SDRAM, which can store the captured image frames. This system consists of the black and white converter module so that the black and white images only stored in the data. VGA Controller module in the FPGA always reads the pixel data from one of the ports of DDR SDRAM and it generates the required signals to display the video on the monitor.

Keywords: CMOS Sensor, FPGA, SDRAM, VGA Controller