Indian Journal of Science and Technology
Year: 2015, Volume: 8, Issue: 31, Pages: 1-6
Department of Electronics Tele Communication, Bharath University, Chennai-600073, Tamil Nadu, India; [email protected]
In testing of single chip there are many approach were found to need their requirement. But for the SOCs we have less, in this paper a Protected Test Wrapper - PTW design introduce to protect SOCs that is compatible with IEEE 1500 standards. PTW protects internal scan chains and primary inputs, primary outputs, which may contain many critical data during the normal system operation like encryption keys. In the earlier system testing that is original IEEE 1500 standard will not concern about the Primary Input and Primary Output security, where as this PTW will secure the primary input and output in both scan mode and normal system functional mode. To achieve this protected test wrapper no extra larger component are required by changing the IEEE 1500 with some light weight block cipher we protect the core from the hacker.
Keywords: Boundary Scan, Design for Testing, Light Weight Block Cipher, Protection.
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