Indian Journal of Science and Technology

Abstract

Power attack is the most powerful side channel attacks in cryptography chip during VLSI (Very Large Scale Integration) testing. Hackers attack the target devices by means of power through finding the correlations between the power spikes for different input generated on Cathode Ray Oscilloscope (CRO). To overcome such a great issues we proposed the novel techniques for cryptography devices which perform their crypto functions without an external power source. Energy required to do the cryptographic operation is provided by Embedded Capacitance Power Supply (ECPS) method, which is integrated with the VLSI device. Group of capacitors are connected to form the power supply, which act as the temporary battery of the cryptographic chip. The power spikes for this crypto operation not visible by the CRO. Hence it is complicate for attackers to hack the crypto system. The proposed method is modelled through Hardware Description Language (HDL) Verilog-AMS using Switch Level Modelling and result is verified by simulation wave form generated. 

Keywords: Cryptography Chip, Embedded Capacitance Power Supply, Side Channel Attack, VLSI Testing