Indian Journal of Science and Technology
DOI: 10.17485/ijst/2016/v9i44/105274
Year: 2016, Volume: 9, Issue: 44, Pages: 1-8
Original Article
Sarita Kumari*, Rishab Mehra and Aminul Islam
Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India; [email protected], [email protected], [email protected]
*Author for correspondence
Sarita Kumari
Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India; [email protected]
Objectives: The impact of process variations on the open circuit voltage gain of CMOS inverting amplifiers is investigated and appropriate aspect ratios are calculated so as to minimize the effect of threshold voltage modulation in short channel devices. Methods/Analysis: A diode connected MOS voltage divider is used for biasing the amplifiers. These dividers are less bulky as compared to their resistive counterparts, save chip area and provide better reliability when subjected to variations. Findings: The sensitivity parameters for the voltage gain are modeled and their dependences are studied. All simulation results have been performed using CADENCE Virtuoso Analog Design Environment @ 45-nm technology node. Application: Push-pull inverting amplifiers are used in CMOS Transimpedance Amplifier forlow noise, high gain and large dynamic range. Transimpedance amplifiers find numerous applications inthe field of optical communications.
Keywords: Aspect Ratio, Gain, Inverting, MOS Divider, Saturation, Sensitivity, Variability
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